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  the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information. mos integrated circuit m m m m pd16877 monolithic quad h-bridge driver circuit document no. s13964ej1v0ds00 (1st edition) date published march 2000 n cp(k) printed in japan data sheet 2000 description the m pd16877 is monolithic quad h-bridge driver lsi which uses power mosfets in the output stages. by using the mos process, this driver ic has substantially improved saturation voltage and power consumption as compared with conventional driver circuits using bipolar transistors. by eliminating the charge pump circuit, the current during power-off is drastically decreased. in addition, a low-voltage malfunction prevention circuit is also provided that prevents the ic from malfunctioning when the supply voltage drops. as the package, a 24-pin plastic tssop is adopted to enable the creation of compact, slim application sets. this driver ic can drive two stepping motor at the same time, and is ideal for driving stepping motors in the lens of a camcorder. features four h bridge circuits employing power mosfets low current consumption by eliminating charge pump v m pin current when power-off: 10 m a max. v dd pin current: 10 m a max. input logic frequency: 100 khz 3-v power supply minimum operating supply voltage: 2.5 v low voltage malfunction prevention circuit 24-pin plastic tssop (5.72 mm (225)) ordering information part number package m pd16877ma-6a5 24-pin plastic tssop (5.72 mm (225))
data sheet s13964ej1v0ds00 2 m m m m pd16877 absolute maximum ratings (t a = 25 c) when mounted on a glass epoxy board (10 cm 10 cm 1 mm, 15% copper foil) parameter symbol condition rating unit control block supply voltage v dd - 0.5 to +6.0 v output block supply voltage v m - 0.5 to +6.0 v input voltage v in - 0.5 to v dd + 0.5 v output terminal voltage v out 6.2 v i d(dc) dc 0.3 a/ch output current i d(pulse) pw 10 ms, duty 5% 0.7 a/ch power consumption p t 0.7 w peak junction temperature t ch(max) 150 c storage temperature range t stg - 55 to +150 c recommended operating conditions when mounted on a glass epoxy board (10 cm 10 cm 1 mm, 15% copper foil) parameter symbol condition min. typ. max. unit control block supply voltage v dd 2.5 5.5 v output block supply voltage v m 2.7 5.5 v output current i d(dc) dc - 0.2 +0.2 a operating frequency f in in, en terminal 100 khz operating temperature range t a - 10 85 c peak junction temperature t ch(max) 125 c characteristics (unless otherwise specified, v dd = v m = 3 v, t a = 25 c) parameter symbol condition min. typ. max. unit off state v m pin current i m(off) all control terminal: l level 10 m a v dd pin current i dd all control terminal: l level 10 m a high level input current i ih v in = v dd 0.06 ma low level input current i il v in = 0 v - 1.0 m a input pull down resistance r ind 50 200 k w high level input voltage v ih 0.7 v dd v dd +0.3 v low level input voltage v il 2.5 v v dd 5.5 v - 3.0 0.3 v dd v h-bridge on resistance r on 2.5 v v m , v dd 5.5 v upper + lower 3.0 w v dds1 v m = 5 v - 10 c t a +85 c 0.8 2.5 v low voltage malfunction prevention circuit operating voltage v dds2 v m = 3 v - 10 c t a +85 c 0.65 2.5 v h bridge output turn-on time t onh 0.7 20 m s h bridge output turn-off time t offh 0.2 0.5 m s h bridge output rise time t r 0.1 0.4 1.0 m s h bridge output fall time t f r m = 20 w figure 1 70 200 ns
data sheet s13964ej1v0ds00 3 m m m m pd16877 figure 1. switching time condition 100% 50% 0% 100% 100% 90% 90% - 10% 0% - 10% - 50% - 50% - 90% - 90% - 100% 50% the current flowing in the direction from out_ a to out_ b is assumed to be (+). 50% 10% 10% t onh t onh t offh t offh i d v in t f t r t f t r 50% function table channel 1 channel 2 en 1 in 1 out 1a out 1b en 2 in 2 out 2a out 2b hlhl hlhl hhlh hhlh llzz llzz lhzz lhzz channel 3 channel 4 en 3 in 3 out 3a out 3b en 4 in 4 out 4a out 4b hlhl hlhl hhlh hhlh llzz llzz lhzz lhzz h: high-level, l: low-level, z: high impedance
data sheet s13964ej1v0ds00 4 m m m m pd16877 pin connection 1 2 3 4 5 6 7 8 9 10 11 12 v dd out 1b pgnd out 2b v m23 out 3b pgnd out 4b en 4 in 4 en 3 in 3 24 23 22 21 20 19 18 17 16 15 14 13 v m1 out 1a pgnd out 2a out 3a pgnd out 4a v m4 in 1 en 1 in 2 en 2 pin no. pin name pin function pin no. pin name pin function 1v m1 output block supply voltage input terminal 13 in 3 control terminal (channel 3) 2out 1a output terminal 14 en 3 enable terminal (channel 3) 3 pgnd ground terminal 15 in 4 control terminal (channel 4) 4out 2a output terminal 16 en 4 enable terminal (channel 4) 5out 3a output terminal 17 out 4b output terminal 6 pgnd ground terminal 18 pgnd ground terminal 7out 4a output terminal 19 out 3b output terminal 8v m4 output block supply voltage input terminal 20 v m23 output block supply voltage input terminal 9in 1 control terminal (channel 1) 21 out 2b output terminal 10 en 1 enable terminal (channel 1) 22 pgnd ground terminal 11 in 2 control terminal (channel 2) 23 out 1b output terminal 12 en 2 enable terminal (channel 2) 24 v dd control block supply voltage input terminal
data sheet s13964ej1v0ds00 5 m m m m pd16877 block diagram low volatge malfunction prevention circuit v dd in 1 en 1 v m1 out 1a out 1b pgnd v m23 out 2a out 2b pgnd out 3a out 3b pgnd v m4 out 4a out 4b pgnd in 2 en 2 in 3 en 3 in 4 en 4 control circuit (4) h-bridge (1) h-bridge (2) h-bridge (4) h-bridge (3) control circuit (1) control circuit (2) control circuit (3) 9 10 11 12 13 14 15 16 1 24 2 23 3 20 4 21 22 5 19 6 8 7 17 18 remark plural terminal (v m , pgnd) is not only 1 terminal and connect all terminals.
data sheet s13964ej1v0ds00 6 m m m m pd16877 typical characteristics - 10 0 0 0.2 0.4 0.6 total power dissipation p t (w) 0.8 1.0 20 40 60 ambient temperature t a ( c) 80 100 120 0.7w 178 c/w p t vs. t a characteristics 6 5 4 3 2 1 0 5 10 15 20 25 off state v m pin current i m (off) ( a) 30 35 output block supply voltage v m (v) i m (off) vs. v m characteristics t a = 25 c control : "l" t a = 25 c control : "l" t a = 25 ct a = 25 c t a = 25 c m 6 5 4 3 2 1 0 10 20 30 40 50 input current i ih i il ( a) 60 control block supply voltage v dd (v) i ih , i il vs. v dd characteristics m 6 5 4 3 2 1 0 0.1 0.2 0.3 0.4 0.5 v dd pin current i dd ( a) 0.6 0.7 control block supply voltage v dd (v) i dd vs. v dd characteristics m 6 5 4 3 2 1 0.5 1.0 1.5 2.0 low voltage detection voltage v dds (v) output block supply voltage v m (v) v dds vs. v m characteristics 6 5 4 3 2 1 00 1.0 2.0 3.0 4.0 input voltage v ih , v il (v) control block supply voltage v dd (v) v ih , v il vs. v dd characteristics i ih i il v ih , v il v dd (l h) v dd (h l)
data sheet s13964ej1v0ds00 7 m m m m pd16877 t a = 25 c t a = 25 c 6 5 4 3 2 1 0 0.2 0.4 0.6 h-bridge output turn-off time t offh ( s) h-bridge output turn-on time t onh ( s) 0.8 1.0 output block supply voltage v m (v) t onh , t offh vs. v m characteristics m 6 5 4 3 2 1 0 0.5 1.0 1.5 2.0 2.5 h-bridge on resistance r on ( w ) 3.0 output block supply voltage v m (v) r on vs. v m characteristics t offh t a = 25 c 6 5 4 3 2 1 0 0.2 0.1 0.6 0.8 1.0 output block supply voltage v m (v) t r , t f vs. v m characteristics t r t f t onh m h-bridge output fall time t f ( s) h-bridge output rise time t r ( s) m m
data sheet s13964ej1v0ds00 8 m m m m pd16877 standard connection example m dc/dc converter cpu motor1 out 1a v m4 v dd = v m = 2.7 v to 5.5 v low voltage malfunction prevention circuit v m4 v m2 3 h-bridge (1) h-bridge (2) level shift circuit control circuit h-bridge (3) h-bridge (4) out 2a in 1 v dd en 1 in 2 en 2 in 3 en 3 in 4 en 4 out 2b out 1b pgnd out 3a out 3b pgnd out 4a out 4b pgnd pgnd 1 to 10 f m 1 to 10 f motor2
data sheet s13964ej1v0ds00 9 m m m m pd16877 package dimension s 24-pin plastic tssop (5.72 mm (225)) note each lead centerline is located within 0.10 mm of its true position (t.p.) at maximum material condition. item millimeters a a' c d 6.65 0.10 6.5 0.1 0.1 0.05 f 0.5 (t.p.) g b 0.575 e 0.22 0.05 1.2 max. h 1.0 0.05 i 6.4 0.1 j 4.4 0.1 k 0.145 0.025 l 0.5 m 0.10 n 0.08 r 0.25 1.0 0.1 s 0.6 0.15 s24ma-50-6a5 p3 + 5 - 3 24 13 1 12 m s n k f g l r s e p j dm c a b a' h i detail of lead end
data sheet s13964ej1v0ds00 10 m m m m pd16877 recommended soldering conditions solder this product under the following recommended conditions. for soldering methods and conditions other than those recommended, consult nec. for details of the recommended soldering conditions, refer to information document semiconductor device mounting technology manual . soldering method soldering conditions recommended condition symbol infrared reflow package peak temperature: 235 c; time: 30 secs. max. (210 c min.); number of times: 3 times max; number of day: none; flux: rosin-based flux with little chlorine content (chlorine: 0.2wt% max.) is recommended. ir35-00-3 vps package peak temperature: 215 c; time: 40 secs. max. (200 c min.); number of times: 3 times max.; number of day: none; flux: rosin-based flux with little chlorine content (chlorine: 0.2 wt% max.) is recommended. vp15-00-3 wave soldering package peak temperature: 260 c; time: 10 secs. max.; preheating temperature: 120 c max.; number of times: once; flux: rosin-based flux with little chlorine content (chlorine: 0.2 wt% max.) is recommended. ws60-00-1 caution do not use two or more soldering methods in combination.
data sheet s13964ej1v0ds00 11 m m m m pd16877 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
m m m m pd16877 the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. nec corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. m7 98. 8


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